LED on SOI substrates
With the need for ever smaller structures on microelectronic
chips, an increasing interest emerges in devices made on so-called
silicon-on-insulator (SOI) samples, in which a very thin (typically
a few 100nm) crystalline silicon layer is separated from the substrate
by an oxide layer [M.A. Green, “Silicon-on-Insulator (SOI):
A Path for Integration of Silicon Light Emitters into Future Microelectronic
Chips?”, 2003 Advanced Microelectronics Research Workshop,
Corsica, June, 2003]. In one of the key projects within the photonics
research strand, the aim is the development of efficient light
emitting diodes (LEDs) on SOI-wafers. During 2003, lateral p-i-n
structures, as shown below, were designed and fabricated on commercially
available SOI-wafers from Canon ELTRAN, Japan, and from Soitec,
France.
Cross section view of p-i-n LED on SOI substrate.
The devices made on SOI wafers from Soitec with 200
nm to 300 nm initial silicon layer thickness have so far demonstrated
a clear diode characteristic and under forward bias an electroluminescence
signal could be monitored using our very sensitive luminescence
set-up [Zhao et al, in preparation for publication in Applied Physics
Letters]. The emitted spectrum, with a maximum around a wavelength
of 1135 nm clearly indicates that the emission is indeed from the
thin active silicon layer. The quantum efficiency of the emission
is however fairly low (~10-6). Another interesting aspect of this
work is that some of the diodes emit visible light under forward
bias, an observationthat has so far only been made under reverse
bias by other researchers.
Unfortunately, the LEDs fabricated on the expected
higher quality Canon ELTRAN SOI wafers had poor electrical and
optical performances. The ultra-thin 55nm initial top silicon layer
had proved to be a difficult starting point for our present LED
processing method with thermal oxidation, boron and phosphorus
diffusions. It is expected that using CVD deposited SiO2 layers
as etching and diffusion masks will improve the device processing
control. The Centre’s recently purchased PECVD system from
Roth and Rau may prove to be a very useful tool for such oxide
layer deposition process.
Further work includes the identification of the origin
of the visible luminescence and the demonstration of higher EQEs.
One way to achieve the latter goal is a further reduction of the
active layer thickness. During several photo-lithographical steps
in the processing of the diodes the active silicon layer becomes
successively thinner due to repeated oxidation steps. On the other
hand, quantum confined luminescence from crystalline silicon has
been demonstrated earlier by Centre researchers using very similar
techniques, i.e., the oxidation of SOI samples. The idea is thus
to gain enough control over the process that a device with a thickness
of only a few nanometers can controllably be processed. The emission
can then not only be expected to be more efficient but is also
centred at shorter wavelength, which in turn would improve the
prospects for optical communication between such a diode and a
normal bulk silicon detector. Due to the fact that the optical
properties change quite dramatically in quantum-confined silicon
when quasi-direct optical transitions become allowed, there are
also chances to obtain lasing action from these devices, an exciting
prospect, which will be investigated thoroughly. |
